WSU researchers receive grant for new computing system design

Framework will use 3D chips to hold multiple kinds of processors, optimize resources



Researchers from WSU’s School of Electrical Engineering and Computer Science and Duke University are utilizing 3D chips to develop a new computing framework.

BRADLEY GAMBLE, Evergreen reporter

The National Science Foundation gave WSU and Duke University researchers a three-year grant to develop a new computing framework, which will use 3D chips to increase the efficiency of computing and communication. 

Partha Pratim Pande, director of WSU’s School of Electrical Engineering and Computer Science, said the research team is using a holistic approach for their design rather than the traditional piecemeal approach. The holistic approach develops various types of processors, memory and accelerators at once rather than in isolation.

The research team aims to go beyond traditional computing by creating a new hardware architecture that is reliable, self-manageable and energy-efficient, Pande said.

Jana Doppa, EECS chair assistant professor, said the framework is designed to save time and energy by having storage and computing happen in the same area on the chip.

The team is trying to implement heterogeneous chips rather than homogeneous chips, Doppa said. Heterogeneous chips hold different kinds of processors in one system, and homogeneous chips only hold one type of processor. These processors include graphic and computer processing units.

The team plans to use 3D chips over flat chips to add more processors, Doppa said. These chips stack on top of each other to integrate more cores, resulting in a smaller connection distance. The smaller connection distances increase communication efficiency in the chips.

The 3D chips have caused some trouble with designing the framework, Pande said. The team is working to overcome heavy levels of integration and power density increases caused by the use of 3D chips.

Doppa said the chips will utilize machine learning to help optimize resources for the application while in use. This improves the chip’s performance, power consumption and reliability of the overall computing substrate. 

“The idea is, for a given application, there are different parts of the code that would benefit from different costs,” he said. “If there is some part of the computation that would benefit from a specific processor, then we will be running it.”

Machine learning does more than just improving computer chips, it also helps the researchers design the hardware, Pande said. 

He said machine learning works as a control knob to help estimate how much hardware and memory are needed for the design.

“When you are designing a system, you need to have suitable control knobs,” he said. “We use machine learning as a control mechanism for the hardware knobs to come up with suitable design elements.”